1. Field of the Invention
Embodiments of the present invention relate to compositions and methods for removing a conductive material from a substrate.
2. Background of the Related Art
Reliably producing sub-half micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large-scale integration (ULSI) of semiconductor devices. However, as the limits of circuit technology are pushed, the shrinking dimensions of interconnects in VLSI and ULSI technology have placed additional demands on processing capabilities. Reliable formation of interconnects is important to VLSI and ULSI success and to the continued effort to increase circuit density and quality of individual substrates and die.
Multilevel interconnects are formed using sequential material deposition and material removal techniques on a substrate surface to form features therein. As layers of materials are sequentially deposited and removed, the uppermost surface of the substrate may become non-planar across its surface and require planarization prior to further processing. Planarization or “polishing” is a process where material is removed from the surface of the substrate to form a generally even, planar surface. Planarization is useful in removing excess deposited material, removing undesired surface topography, and surface defects, such as surface roughness, agglomerated materials, crystal lattice damage, scratches and contaminated layers or materials to provide an even surface for subsequent photolithography and other semiconductor processes.
Chemical mechanical planarization or chemical mechanical polishing (CMP) is a common technique used to planarize substrates. In conventional CMP techniques, a substrate carrier or polishing head is mounted on a carrier assembly and positioned in contact with a polishing article in a CMP apparatus. The carrier assembly provides a controllable pressure to the substrate urging the substrate against the polishing pad. The pad is moved relative to the substrate by an external driving force. Thus, the CMP apparatus effects polishing or rubbing movement between the surface of the substrate and the polishing article while dispersing a polishing composition to effect both chemical activity and mechanical activity.
However, materials deposited on the surface of a substrate to fill feature definitions formed therein often result in unevenly formed surfaces over feature definitions of variable density. Referring to FIG. 1A, a metal layer 20 is deposited on a substrate 10 to fill wide feature definitions 30, also known as low density feature definitions, or narrow feature definitions 40, also known as and high density feature definitions. Excess material, called overburden, may be formed with a greater thickness 45 over the narrow feature definitions 40 and may have minimal deposition 35 over wide feature definitions 30. Polishing of surfaces with overburden may result in the retention of residues 50 from inadequate metal removal over narrow features. Overpolishing processes to remove such residues 50 may result in excess metal removal over wide feature definitions 30. Excess metal removal can form topographical defects, such as concavities or depressions known as dishing 55, over wide features, as shown in FIG. 1B.
Dishing of features and retention of residues on the substrate surface are undesirable since dishing and residues may detrimentally affect subsequent processing of the substrate. For example, dishing results in a non-planar surface that impairs the ability to print high-resolution lines during subsequent photolithographic steps and detrimentally affects subsequent surface topography of the substrate, which affects device formation and yields. Dishing also detrimentally affects the performance of devices by lowering the conductance and increasing the resistance of the devices, causing device variability and device yield loss. Residues may lead to uneven polishing of subsequent materials, such as barrier layer materials (not shown) disposed between the conductive material and the substrate surface. Post CMP profiles generally show higher dishing on wide trenches than on narrow trenches or dense areas. Uneven polishing will also increase defect formation in devices and reduce substrate yields.
One approach to polish substrate surfaces with minimal defects is by an electrochemical mechanical polishing technique. In an electrochemical mechanical polishing technique, the material to be polished is removed additionally by anodic dissolution compared to chemical mechanical polishing. In one example of an electrochemical mechanical polishing technique described in commonly owned U.S. Pat. No. 6,811,680, issued on Nov. 2, 2004, a passivation layer is formed on the substrate surface to inhibit anodic dissolution until the passivation layer is removed by mechanical forces. However, passivation layers in electrochemical mechanical polishing processes may be difficult to remove under the mechanical forces used in such processes. The difficult removal of the passivation layer may result in less than desirable surface finishing and may still require some overpolishing to remove residual materials remaining after passivation layer removal.
Therefore, there is a need for compositions and methods for removing conductive material from a substrate that minimizes damage to the substrate during planarization.